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the information contained in this document is being issued in advance of the production cycle for the product. the parameters for the product may change before final production or nec electronics corporation, at its own discretion, may withdraw the product prior to its production. not all products and/or types are availabe in every country. please check with an nec electronics sales representative for availability and additional information. document no. u17798ej1v0pm00 (1st edition) date published december 2005 ns cp(k) printed in japan 8-bit single-chip microcontroller preliminary product information mos integrated circuit PD78F9210FH, 78f9211fh, 78f9212fh the 78f9210fh, 78f9211fh, and 78f9212fh are products of the 78k0s/ky1+ in the 78k/0s series. these microcontrollers feat ure single-voltage and self-programming flash memory and peripherals that is suitable for your application. the functions of these microcontrollers are described in the following user's manuals. refer to these manuals when designing a system based on any of these microcontrollers. 78k0s/ky1+ user's manual : u16994e 78k/0s series user's manual, instruction : u11047e features ? 78k/0s cpu core, 8-bit cisc architecture ? rom and ram capacities item product name program memory (flash eeprom) data memory (high-speed ram) PD78F9210FH 1 kbytes 128 bytes pd78f9211fh 2 kbytes 128 bytes pd78f9212fh 4 kbytes 128 bytes ? minimum instruction execution time minimum instruction execution time selectable from high speed (0.2 s) to low speed (3.2 s) (with cpu clock of 10 mhz) ? system clock high-speed internal oscillator: 8 mhz (typ.) ceramic/crystal oscillator: 1 mhz to 10 mhz ? wdt clock low-speed internal oscillator: 240 khz (typ.) ? interrupt external: 2 sources internal: 5 sources ? i/o port: 14 cmos i/o: 13 cmos input: 1 ? on-chip a/d converter 10-bit resolution a/d converter: 4 ch (2.7 to 5.5 v) ? timer/counter 16-bit timer: 1 ch 8-bit timer: 1 ch ? watchdog timer: 1 ch ? operation voltage: 2.0 v to 5.5 v ? package: 16-pin wlcsp (1.93 x 2.24 x thickness of 0.4 mm, 0.5 mm pitch) application fields household electrical appliances, toys, mobile device ? nec electronics cor p oration 2005
2 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm ordering information part number package PD78F9210FH-2a2-a 16-pin wlcsp (1.93x2.24x 0.4 mm in thickness, 0.5 mm pitch) pd78f9211fh-2a2-a 16-pin wlcsp (1.93x2.24x 0.4 mm in thickness, 0.5 mm pitch) pd78f9212fh-2a2-a 16-pin wlcsp (1.93x2.24x 0.4 mm in thickness, 0.5 mm pitch) remark products with -a at the end of the part number are lead-free products.
3 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm overview of functions item PD78F9210FH pd78f9211fh pd78f9212fh flash memory 1 kb 2 kb 4 kb internal memory high-speed ram note 1 128 bytes memory space 64 kb x1 input clock (oscillation frequency) crystal/ceramic oscillation, external system clock input 10 mhz: v dd = 2.0 to 5.5 v high-speed internal oscillation: 8 mhz (typ.) internal oscillation clock low-speed internal oscillation: 240 khz (typ.) general-purpose registers 8 bits 8 registers instruction execution time 0.2 s/0.4 s/0.8 s/1.6 s/3.2 s/ (x1 input clock: @ f x = 10 mhz operation) i/o ports total: 14 cmos i/o: 13 cmos input 1 timers ? 16-bit timer/ev ent counter: 1 channel 8-bit timer(timer h1): 1 channel watchdog timer: 1 channel timer outputs 2 (pwm output: 1) a/d converter 10-bit resolution 4 channels external 2 vectored interrupt sources internal 5 reset reset using reset pin internal reset by watchdog timer internal reset by power-on-clear internal reset by low-voltage detector power supply voltage v dd = 2.0 to 5.5 v note operating ambient temperature t a = ? 40 to +85 c package 16-pin wlcsp note use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on- clear(poc) circuit is 2.1 v 0.1 v.
4 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm contents 1. pin configuration.............................................................................................................. ....... 5 2. block diagram .................................................................................................................. ......... 6 3. pin functions .................................................................................................................. ............ 7 3.1 port pins ...................................................................................................................... ........................... 7 3.2 non-port pins.................................................................................................................. ....................... 8 3.3 pin i/o circuits and recommended connection of u nused pins ..................................................... 9 4. memory space ................................................................................................................... ........ 11 4.1 memory space................................................................................................................... .................... 11 4.2 memory conf iguration........................................................................................................... ............... 14 5. option byte.................................................................................................................... ............. 15 5.1 functions of option byte ....................................................................................................... .............. 15 5.2 format of op tion byte .......................................................................................................... ................ 16 6. source clock of each timer .............................................................................................. 18 7. electrical specifications (target values)................................................................. 19 8. package drawing (preliminary) ...................................... .................................................. 31 appendix a related documents ............................................................................................ 32
5 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 1. pin configuration ? 16-pin wlcsp (1.93x2.24x0.4 mm in thickness, 0.5 mm pitch) d c b a top view bottom view index mark 4321 1234 pin no. pin name pin no. pin name a1 p20/ani0/ti000/toh1 c1 p42 a2 v ss note1 c2 p43 a3 p47 c3 p34/reset a4 p23/x1/ani3 c4 p45 b1 p41 d1 p21/ani1/ti010/to000/intp0 b2 p40 d2 p32/intp1 b3 v dd note2 d3 p44 b4 p46 d4 p22/x2/ani2 ani0 to ani3: analog input ti000, ti010: timer input intp0, intp1: external interrupt input to00, toh1: timer output p20 to p23: port 2 v dd note2 : power supply p32, p34: port 3 v ss note1 : ground p40 to p47: port 4 x1, x2: crystal oscillator (x1 input clock) reset: reset notes 1. v ss functions alternately as the ground potential of the a/d converter. be sure to connect v ss to a stabilized gnd (= 0 v). 2. v dd functions alternately as the a/d converter refe rence voltage input. when us ing the a/d converter, stabilize v dd at the supply voltage used (2.7 to 5.5 v).
6 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 2. block diagram 78k0s cpu core internal high-speed ram flash memory v ss note2 v dd note1 port 2 p20-p23 4 power on clear/ low voltage indicator poc/lvi control reset control system control high-speed internal oscillator reset/p34 x1/p23 x2/p22 16-bit timer/ event counter 00 to00/ti010/p21 ti000/p20 toh1/p20 low-speed internal oscillator 8-bit timer h1 intp0/p21 intp1/p32 ani0/p20- ani3/p23 4 a/d converter interrupt control port 3 p32 p34 port 4 note1 p40-p47 8 notes 1. v dd functions alternately as the a/d converter refe rence voltage input. when us ing the a/d converter, stabilize v dd at the supply voltage used (2.7 to 5.5 v). 2. v ss functions alternately as the ground potential of the a/d converter. be sure to connect v ss to a stabilized gnd (= 0 v).
7 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 3. pin functions 3.1 port pins pin name i/o function afte r reset alternate-function pin p20 ani0/ti000/toh1 p21 ani1/ti010/ to00/intp0 p22 note x2/ani2 note p23 note i/o port 2. 4-bit i/o port. can be set to input or output mode in 1-bit units. an on-chip pull-up resistor can be connected by setting software. input x1/ani3 note p32 i/o can be set to input or output mode in 1-bit units. an on-chip pull-up resistor can be connected by setting software. input intp1 p34 note input port 3 input only input reset note p40 to p47 i/o port 4. 8-bit i/o port. can be set to input or output mode in 1-bit units. an on-chip pull-up resistor can be connected by setting software. input ? note for the setting method for pin functions, see 5. option byte . caution the p22/x2/ani2 and p23/x1/ ani3 pins are pulled down during reset.
8 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 3.2 non-port pins pin name i/o function after reset alternate- function pin intp0 p21/ani1/ti010/ to00 intp1 input external interrupt input for which the valid edge (rising edge, falling edge, or both rising and falling edges) can be specified input p32 ti000 external count clock input to 16-bit timer/event counter 00. capture trigger input to captur e registers (cr000 and cr010) of 16-bit timer/event counter 00 p20/ani0/toh1 ti010 input capture trigger input to captur e register (cr000) of 16-bit timer/event counter 00 input p21/ani1/to00/ intp0 to00 output 16-bit timer/event counter 00 output input p21/ani1/ti010/ intp0 toh1 output 8-bit timer h1 output input p20/ani0/ti000 ani0 p20/ti000/toh1 ani1 p21/ti010/to00/ intp0 ani2 note p22/x2 note ani3 note input analog input of a/d converter input p23/x1 note reset note input system reset input input p34 note x1 note input connection of crystal/ceramic oscillator for system clock oscillation. external clock input. ? p23/ani3 note x2 note ? connection of crystal/ceramic oscillator for system clock oscillation. ? p22/ani2 note v dd ? positive power supply ? ? v ss ? ground potential ? ? note for the setting method for pin functions, see 5. option byte . caution the p22/x2/ani2 and p23/x1/ ani3 pins are pulled down during reset.
9 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 3.3 pin i/o circuits and recommende d connection of unused pins the input/output circuit type of eac h pin and recommended connection of unused pi ns is shown in table 3-1. for the input/output circuit configurati on of each type, refer to figure 3-1. table 3-1. type of i/o circuit for each pin and connection of unused pins pin name i/o circuit type i/o recommended connection of unused pin p20/ani0/ti000/toh1 p21/ani1/ti010/to00/ intp0 11 input: individually connect to v dd or v ss via resistor. output: leave open. p22/ani2/x2 p23/ani3/x1 36 input: individually connect to v ss via resistor. output: leave open. p32/intp1 8-a i/o input: individually connect to v dd or v ss via resistor. output: leave open. p34/reset 2 input connect to v dd via resistor. p40 to p47 8-a i/o input: individually connect to v dd or v ss via resistor. output: leave open.
10 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm figure 3-1. pin input/output circuits type 2 type 11 type 36 type 8-a in schmitt-triggered input with hysteresis characteristics pull up enable data output disable v dd p-ch v dd p-ch in/out n-ch data output disable pull up enable v dd p-ch n-ch in/out comparison voltage v ss p-ch n-ch + input enable - v dd p-ch comparator p-ch feedback cut-off x1, in/out x2, in/out osc enable data output disable v dd p-ch n-ch v ss p-ch n-ch + - pullup enable v dd p-ch data output disable v dd p-ch n-ch v ss p-ch n-ch + - pullup enable v dd p-ch comparator comparator v ss v ss v ss comparison voltage comparison voltage
11 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 4. memory space 4.1 memory space products in the PD78F9210FH, 78f9211fh, and 78f9212fh can access up to 64 kb ytes of memory space. figures 4-1 to 4-3 show the memory maps. figure 4-1. memory map ( PD78F9210FH) special function registers (sfr) 256 8 bits internal high-speed ram 128 8 bits flash memory 1,024 8 bits use prohibited program memory space data memory space ffffh ff00h feffh fe80h fe7fh 0400h 03ffh 0000h program area option byte area program area callt table area vector table area 03ffh 0040h 003fh 0014h 0013h 0000h protect byte area 0082h 0081h 0080h 007fh remark the option byte and protec t byte are 1 byte each.
12 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm figure 4-2. memory map ( pd78f9211fh) special function registers (sfr) 256 8 bits internal high-speed ram 128 8 bits flash memory 2,048 8 bits program memory space data memory space use prohibited ffffh ff00h feffh fe80h fe7fh 0800h 07ffh 0000h program area option byte area program area callt table area vector table area 07ffh 0040h 003fh 0014h 0013h 0000h protect byte area 0082h 0081h 0080h 007fh remark the option byte and protec t byte are 1 byte each.
13 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm figure 4-3. memory map ( pd78f9212fh) special function registers (sfr) 256 8 bits internal high-speed ram 128 8 bits flash memory 4,096 8 bits program memory space data memory space use prohibited ffffh ff00h feffh fe80h fe7fh 1000h 0fffh 0000h program area option byte area program area callt table area vector table area 0fffh 0040h 003fh 0014h 0013h 0000h protect byte area 0082h 0081h 0080h 007fh remark the option byte and protec t byte are 1 byte each.
14 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 4.2 memory configuration the 1/2/4 kb internal flash memory area is divided into 4/8/16 blocks and can be programmed/erased in block units. all the blocks can also be erased at once, by using a dedicated flash programmer. figure 4-4. flash memory mapping special function resister (256 byte) internal high-speed ram (128 byte) flash memory (1/2/4 kb) ffffh ff00h feffh 0000h use prohibited fe80h fe7fh 1 kb block 0 (256 bytes) block 1 (256 bytes) block 2 (256 bytes) block 3 (256 bytes) PD78F9210FH 0000h 0100h 00ffh block 0 (256 bytes) block 1 (256 bytes) block 2 (256 bytes) block 3 (256 bytes) block 4 (256 bytes) block 5 (256 bytes) block 6 (256 bytes) block 7 (256 bytes) block 0 (256 bytes) block 1 (256 bytes) block 2 (256 bytes) block 3 (256 bytes) block 4 (256 bytes) block 5 (256 bytes) block 6 (256 bytes) block 7 (256 bytes) block 8 (256 bytes) block 9 (256 bytes) block 10 (256 bytes) block 11 (256 bytes) block 12 (256 bytes) block 13 (256 bytes) block 14 (256 bytes) block 15 (256 bytes) 2 kb 4 kb 0200h 01ffh 0300h 02ffh 0400h 03ffh 0500h 04ffh 0600h 05ffh 0700h 06ffh 0800h 07ffh 0900h 08ffh 0a00h 09ffh 0b00h 0affh 0c00h 0bffh 0d00h 0cffh 0e00h 0dffh 0f00h 0effh 0fffh pd78f9211fh pd78f9212fh
15 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 5. option byte 5.1 functions of option byte the address 0080h of the flash memory of the PD78F9210FH, 78f9211fh, and 78f9212fh is an option byte area. when power is supplied or when starting after a reset, the option byte is automatic ally referenced, and settings for the specified functions are performed. when using the product, be sure to se t the following functions by using the option byte. (1) selection of system clock source ? high-speed internal oscillation clock ? crystal/ceramic oscillation clock ? external clock input (2) low-speed internal oscillation clock oscillation ? cannot be stopped. ? can be stopped by software. (3) control of reset pin ? used as reset pin ? reset pin is used as an input port pin (p34). (4) oscillation stabilization time on pow er application or after reset release ? 2 10 /f x ? 2 12 /f x ? 2 15 /f x ? 2 17 /f x figure 5-1. positioning of option byte option byte oscsel1 rmce 1 1 flash memory (1024/2048/4096 8 bits) 03ffh/ 07ffh/ 0fffh 0000h 0080h def osts1 oscsel0 liocp def osts0
16 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 5.2 format of option byte format of option bytes is shown below. figure 5-2. format of option byte (1/2) address: 0080h 7 6 5 4 3 2 1 0 1 defosts1 defosts0 1 rmce oscsel1 oscsel0 liocp defosts1 defosts0 oscillation stabilization time on power application or after reset release 0 0 2 10 /fx (102.4 s) 0 1 2 12 /fx (409.6 s) 1 0 2 15 /fx (3.27 ms) 1 1 2 17 /fx (13.1 ms) caution the setting of this option is valid only when the crystal/ceramic oscillation clock is selected as the system clock source. no wait time elap ses if the high-speed internal oscillation clock or external clock input is selected as the system clock source. rmce control of reset pin 1 used as reset pin. 0 reset pin is used as input port pin (p34). caution because the option byte is referenced after r eset release, if a low level is input to the reset pin before the option byte is referenced , then the reset state is not released. also, when setting 0 to rmce, connect the pull-up resistor. oscsel1 oscsel0 selection of system clock source 0 0 crystal/ceramic oscillation clock 0 1 external clock input 1 high-speed internal oscillation clock caution because the x1 and x2 pins are also used as th e p23/ani3 and p22/ani2 pins, the conditions under which the x1 and x2 pins can be used differ depending on the selected system clock source. (1) crystal/ceramic oscillation clock is selected the x1 and x2 pins ca nnot be used as i/o port pins or analog input pins of a/d converter because they are used as clock input pins. (2) external clock input is selected because the x1 pin is used as an external clock input pin, p23/ani3 cannot be used as an i/o port pin or an analog input pin of a/d converter. (3) high-speed internal o scillation clock is selected p23/ani3 and p22/ani2 pins can be used as i/o port pins or analog input pins of a/d converter. remark : don?t care
17 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm figure 5-2. format of option byte (2/2) liocp low-speed internal oscillates 1 cannot be stopped (oscillation does not stop even if 1 is written to the lsrstop bit) 0 can be stopped by software (oscillation stops when 1 is written to the lsrstop bit) cautions 1. if it is selected that low-speed inte rnal oscillator cannot be stopped, the count clock to the watchdog timer (wdt) is fixed to lo w-speed internal oscillation clock. 2. if it is selected that lo w-speed internal oscillator can be stopped by software, supply of the count clock to wdt is stopped in the hal t/stop mode, regardless of the setting of bit 0 (lsrstop) of the low-speed internal osc illation mode register (l srcm). similarly, clock supply is also stopped wh en a clock other than the lo w-speed internal oscillation clock is selected as a count clock to wdt. while the low-speed internal oscillator is operating (lsrstop = 0), the clock can be supplied to the 8-bit timer h1 even in the stop mode. remarks 1. ( ): f x = 10 mhz 2. for the oscillation stabilization time of the resonator, refer to the characteristics of the resonator to be used. 3. an example of software coding for setting the option bytes is shown below. opb cseg at 0080h db 10010001b ; set to option byte ; low-speed internal oscillator cannot be stopped ; the system clock is a crystal or ceramic resonator. ; the reset pin is used as an input-only port pin (p34). ; minimum oscillation stabilization time ( 2 10 /f x ) 4. for details on the timing at whic h the option byte is referenced, see the chapter of the reset function 78k0s/ky1+ user's manual (u16994e)
18 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 6. source clock of each timer (1) count clock selection by 16-bi t timer/event counter 00 (tm00) f xp (10 mhz) f xp /22 (2.5 mhz) f xp /28 (39.06 khz) ti000 pin valid edge note note the external clock requires a pulse longer t han two cycles of the internal count clock (f xp ). remarks 1. f xp : oscillation frequency of clock supplied to peripheral hardware 2. ( ): f xp = 10 mhz (2) count clock selection by 8-bi t timer/event counter h1 (tmh1) f xp (10 mhz) f xp /22(2.5 mhz) f xp /24(625 khz) f xp /26(156.25 khz) f xp /212(2.44 khz) f rl /27(1.88 khz (typ.)) remarks 1. f xp : oscillation frequency of clock to peripheral hardware 2. f rl : low-speed internal oscillation clock oscillation frequency 3. figures in parentheses apply to operation at f xp = 10 mhz, f rl = 240 khz (typ.). (3) overflow time se tting by watchdog timer overflow time setting during low-speed internal oscillation clock operation during system clock operation 2 11 /f rl (4.27 ms) 2 13 /f x (819.2 s) 2 12 /f rl (8.53 ms) 2 14 /f x (1.64 ms) 2 13 /f rl (17.07 ms) 2 15 /f x (3.28 ms) 2 14 /f rl (34.13 ms) 2 16 /f x (6.55 ms) 2 15 /f rl (68.27 ms) 2 17 /f x (13.11 ms) 2 16 /f rl (136.53 ms) 2 18 /f x (26.21 ms) 2 17 /f rl (273.07 ms) 2 19 /f x (52.43 ms) 2 18 /f rl (546.13 ms) 2 20 /f x (104.86 ms) remarks 1. f rl : low-speed internal oscillation clock oscillation frequency 2. f x : system clock oscillation frequency 3. figures in parentheses apply to operation at f rl = 480 khz (max.), f x = 10 mhz.
19 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 7. electrical specifications (target values) caution these specifications show target values, which may cha nge after device evaluation. the operating voltage range may also change. absolute maximum ratings (t a = 25 c) parameter symbol conditions ratings unit v dd ? 0.3 to +6.5 v supply voltage v ss ? 0.3 to +0.3 v input voltage v i p20 to p23, p32, p34, p40 to p47 ? 0.3 to v dd + 0.3 note v output voltage v o ? 0.3 to v dd + 0.3 note v analog input voltage v an ? 0.3 to v dd + 0.3 note v per pin ? 10.0 ma output current, high i oh total of p20 to p23, p32, p40 to p47 ? 44.0 ma per pin 20.0 ma output current, low i ol total of p20 to p23, p32, p40 to p47 44.0 ma in normal operation mode c operating ambient temperature t a during flash memory programming ? 40 to +85 c flash memory blank status ? 65 to +150 c storage temperature t stg flash memory progra mming already performed ? 40 to +125 c note must be 6.5 v or lower caution product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. that is, the absolute maximum ratings are rated valu es at which the product is on the verge of suffering physical damage , and therefore the product must be used under conditions that ensure that the absolute m aximum ratings are not exceeded. remark unless specified otherwise, t he characteristics of alternate-function pi ns are the same as those of port pins.
20 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm x1 oscillator characteristics (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note 1 , v ss = 0 v) resonator recommended circuit parameter conditions min. typ. max. unit ceramic resonator x2 x1 v ss c2 c1 oscillation frequency (f x ) note 2 1 10.0 mhz crystal resonator x2 x1 v ss c2 c1 oscillation frequency (f x ) note 2 1 10.0 mhz 2.7 v v dd 5.5 v 1 10.0 x1 input frequency (f x ) note 2 2.0 v v dd < 2.7 v 1 5.0 mhz 2.7 v v dd 5.5 v 0.045 0.5 external clock x1 x1 input high- /low-level width (t xh , t xl ) 2.0 v v dd < 2.7 v 0.09 0.5 s notes 1. use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on clear (poc) circuit is 2.1 v 0.1 v. 2. indicates only oscillator c haracteristics. refer to ac characteristics for instruction execution time. caution when using the x1 oscillator, wire as follows in the area enclosed by the br oken lines in the above figures to avoid an adverse eff ect from wiring capacitance. ? keep the wiring length as short as possible. do not cross the wiring with the other signal lines. do not route the wiring near a signal line th rough which a high fluctuating current flows. always make the ground point of the osc illator capacitor the same potential as v ss . do not ground the capacitor to a ground patte rn through which a high current flows. do not fetch signals from the oscillator. remark for the resonator selection and oscillator constant, users are required to eit her evaluate the oscillation themselves or apply to the resonat or manufacturer for evaluation.
21 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm high-speed internal osc illator characteristics (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note 1 , v ss = 0 v) resonator parameter conditions min. typ. max. unit t a = ? 10 to +70 c 3 % oscillation frequency (f x = 8 mhz note 2 ) deviation 2.7 v v dd 5.5 v t a = ? 40 to +85 c 5 % high-speed internal oscillator oscillation frequency (f x ) note 2 2.0 v v dd < 2.7 v 5.5 mhz notes 1. use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on- clear (poc) circuit is 2.1 v 0.1 v. 2. indicates only oscillator c haracteristics. refer to ac characteristics for instruction execution time. low-speed internal osc illator characteristics (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note , v ss = 0 v) resonator parameter conditions min. typ. max. unit low-speed internal oscillator oscillation frequency (f rl ) 120 240 480 khz note use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on clear (poc) circuit is 2.1 v 0.1 v.
22 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm dc characteristics (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note , v ss = 0 v) (1/2) parameter symbol conditions min. typ. max. unit per pin 2.0 v v dd 5.5 v ?5 ma 4.0 v v dd 5.5 v ?25 ma output current, high i oh total of all pins 2.0 v v dd < 4.0 v ?15 ma per pin 2.0 v v dd 5.5 v 10 ma 4.0 v v dd 5.5 v 30 ma output current, low i ol total of all pins 2.0 v v dd < 4.0 v 15 ma v ih1 p23 in external clock mode and pins other than p20 and p21 0.8v dd v dd v input voltage, high v ih2 p23 in other than external clock mode, p20 and p21 0.7v dd v dd v v il1 p23 in external clock mode and pins other than p20 and p21 0 0.2v dd v input voltage, low v il2 p23 in other than external clock mode, p20 and p21 0 0.3v dd v total of output pins i oh = ?15 ma 4.0 v v dd 5.5 v i oh = ?5 ma v dd ? 1.0 v output voltage, high v oh i oh = ?100 a 2.0 v v dd < 4.0 v v dd ? 0.5 v total of output pins i ol = 30 ma 4.0 v v dd 5.5 v i ol = 10 ma 1.3 v output voltage, low v ol 2.0 v v dd < 4.0 v i ol = 400 a 0.4 v input leakage current, high i lih v i = v dd pins other than x1 3 a input leakage current, low i lil v i = 0 v pins other than x1 ?3 a output leakage current, high i loh v o = v dd pins other than x2 3 a output leakage current, low i lol v o = 0 v pins other than x2 ?3 a pull-up resistance value r pu v i = 0 v 10 30 100 k ? pull-down resistance value r pd p22, p23, reset status 10 30 100 k ? note use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on clear (poc) circuit is 2.1 v 0.1 v. remark unless specified otherwise, t he characteristics of alternate-function pi ns are the same as those of port pins.
23 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm dc characteristics (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note 1 , v ss = 0 v) (2/2) parameter symbol conditions min. typ. max. unit when a/d converter is stopped 6.1 12.2 f x = 10 mhz v dd = 5.0 v 10% note 4 when a/d converter is operating 7.6 15.2 ma when a/d converter is stopped 5.5 11.0 f x = 6 mhz v dd = 5.0 v 10% note 4 when a/d converter is operating 14.0 ma when a/d converter is stopped 3.0 6.0 i dd1 note 3 crystal/ceramic oscillation, external clock input oscillation operating mode note 6 f x = 5 mhz v dd = 3.0 v 10% note 5 when a/d converter is operating 4.5 9.0 ma when peripheral functions are stopped 1.7 3.8 f x = 10 mhz v dd = 5.0 v 10% note 4 when peripheral functions are operating 6.7 ma when peripheral functions are stopped 1.3 3.0 f x = 6 mhz v dd = 5.0 v 10% note 4 when peripheral functions are operating 6.0 ma when peripheral functions are stopped 0.48 1 i dd2 crystal/ceramic oscillation, external clock input halt mode note 6 f x = 5 mhz v dd = 3.0 v 10% note 5 when peripheral functions are operating 2.1 ma when a/d converter is stopped 5.0 10.0 i dd3 note 3 high-speed internal oscillation operating mode note 7 f x = 8 mhz v dd = 5.0 v 10% note 4 when a/d converter is operating 6.5 13.0 ma when peripheral functions are stopped 1.4 3.2 i dd4 high-speed internal oscillation halt mode note 7 f x = 8 mhz v dd = 5.0 v 10% note 4 when peripheral functions are operating 5.9 ma when low-speed internal oscillation is stopped 3.5 35.5 v dd = 5.0 v 10% when low-speed internal oscillation is operating 17.5 63.5 a when low-speed internal oscillation is stopped 3.5 15.5 supply current note 2 i dd5 stop mode v dd = 3.0 v 10% when low-speed internal oscillation is operating 11.0 30.5 a notes 1. use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on clear (poc) circuit is 2.1 v 0.1 v. 2. total current flowing through the internal power supply (v dd ). however, the current that flows through the pull-up resistors of ports is not included. 3. i dd1 and i dd3 includ peripheral operation current. 4. when the processor clock control register (pcc) is set to 00h. 5. when the processor clock control register (pcc) is set to 02h. 6. when crystal/ceramic oscillation clock, external clo ck input is selected as the system clock source using the option byte. 7. when high-speed internal oscillation clock is selected as the system clock source using the option byte.
24 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm ac characteristics basic operation (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note 1 , v ss = 0 v) parameter symbol conditions min. typ. max. unit 4.0 v v dd 5.5 v 0.2 16 s 3.0 v v dd < 4.0 v 0.33 16 s 2.7 v v dd < 3.0 v 0.4 16 s crystal/ceramic oscillation clock, external clock input 2.0 v v dd < 2.7 v 1 16 s 4.0 v v dd 5.5 v 0.23 4.22 s 2.7 v v dd < 4.0 v 0.47 4.22 s cycle time (minimum instruction execution time) t cy high-speed internal oscillation clock 2.0 v v dd < 2.7 v 0.95 4.22 s 4.0 v v dd 5.5 v 2/fsam+ 0.1 note 2 s ti000/ti010 input high-level width, low-level width t tih , t til 2.0 v v dd < 4.0 v 2/fsam+ 0.2 note 2 s interrupt input high-level width, low-level width t inth , t intl 1 s reset input low-level width t rsl 2 s notes 1. use this product in a voltage range of 2.2 to 5.5 v because the detection voltage (v poc ) of the power-on clear (poc) circuit is 2.1 v 0.1 v. 2. selection of fsam = f xp , f xp /4, or f xp /256 is possible using bits 0 and 1 (prm000, prm001) of prescaler mode register 00 (prm00). note that when selecting the ti000/ti010 valid edge as the count clock, fsam = f xp .
25 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm t cy vs. v dd (crystal/ceramic oscillation clock, external clock input) 123456 0.1 0.4 1.0 10 60 0.33 2.7 5.5 16 guaranteed operation range supply voltage v dd [v] cycle time t cy [ s] t cy vs. v dd (high-speed internal oscillator clock) 123456 0.1 1.0 10 60 2.7 5.5 0.23 4.22 0.47 0.95 supply voltage v dd [v] cycle time t cy [ s] guaranteed operation range
26 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm ac timing test points (excluding x1 input) 0.8v dd 0.2v dd 0.8v dd 0.2v dd test points clock timing 1/f x t xl t xh x1 input ti000 timing t til t tih ti000 interrupt input timing intp0, intp1 t intl t inth reset input timing reset t rsl
27 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm a/d converter characteristics (t a = ? 40 to +85 c, 2.7 v v dd 5.5 v note 1 , v ss = 0 v note 2 ) (1) a/d converter basic characteristics parameter symbol conditions min. typ. max. unit resolution 10 10 10 bit 4.5 v v dd 5.5 v 3.0 100 s 4.0 v v dd < 4.5 v 4.8 100 s 2.85 v v dd < 4.0 v 6.0 100 s conversion time t conv 2.7 v v dd < 2.85 v 14.0 100 s analog input voltage v ain v ss note 2 v dd v (2) a/d converter characteristics (hi gh-speed internal oscillation clock) parameter symbol conditions min. typ. max. unit overall error notes 3, 4 ainl ? 0.1 to +0.2 note 5 ? 0.35 to +0.45 %fsr zero-scale error notes 3, 4 ezs ? 0.1 to +0.2 note 5 ? 0.35 to +0.45 %fsr full-scale error notes 3, 4 efs ? 0.1 to +0.2 note 5 ? 0.35 to +0.40 %fsr integral non-linearity error note 3 ile 1 note 5 3 lsb differential non-linearity error note 3 dle 1 note 5 1.5 lsb (3) a/d converter characteristics (crystal/c eramic oscillation clo ck, external clock) parameter symbol conditions min. typ. max. unit 4.0 v v dd 5.5 v ? 0.20 to +0.35 note 5 ? 0.35 to +0.65 %fsr overall error notes 1, 2 ainl 2.7 v v dd < 4.0 v 0.25 note 5 ? 0.35 to +0.55 %fsr 4.0 v v dd 5.5 v ? 0.20 to +0.35 note 5 ? 0.35 to +0.65 %fsr zero-scale error notes 3, 4 ezs 2.7 v v dd < 4.0 v 0.25 note 5 ? 0.35 to +0.55 %fsr 4.0 v v dd 5.5 v ? 0.20 to +0.35 note 5 ? 0.35 to +0.55 %fsr full-scale error notes 3, 4 efs 2.7 v v dd < 4.0 v 0.25 note 5 ? 0.35 to +0.50 %fsr 4.0 v v dd 5.5 v 1.5 note 5 3.0 lsb integral non-linearity error note 3 ile 2.7 v v dd < 4.0 v 1.5 note 5 4.0 lsb 4.0 v v dd 5.5 v 1.0 note 5 2.5 lsb differential non-linearity error note 3 dle 2.7 v v dd < 4.0 v 1.0 note 5 2.5 lsb notes 1. in the PD78F9210FH, 78f9211f h, 78f9212fh, v dd functions alternately as the a/d converter reference voltage input. when using the a/d converter, stabilize v dd at the supply voltage used (2.7 to 5.5 v). 2. in the PD78F9210FH, 78f9211f h, 78f9212fh, v ss functions alternately as the ground potential of the a/d converter. be sure to connect v ss to a stabilized gnd (= 0 v). 3. excludes quantization error ( 1/2 lsb). 4. this value is indicated as a rati o (%fsr) to the full-scale value. 5. a value when halt mode is set by an instruct ion immediately after a/d conversion starts. caution the conversion accuracy may be degraded if the level of a port that is not used for a/d conversion is changed during a/d conversion.
28 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm poc circuit characteristics (t a = ? 40 to +85 c) parameter symbol conditions min. typ. max. unit detection voltage v poc 2.0 2.1 2.2 v power supply rise time t pth v dd : 0 v 2.1 v 1.5 s response delay time 1 note 1 t pthd when power supply rises, after reaching detection voltage (max.) 3.0 ms response delay time 2 note 2 t pd when power supply falls 1.0 ms minimum pulse width t pw 0.2 ms notes 1. time required from voltage detection to internal reset release. 2. time required from voltage detecti on to internal reset signal generation. poc circuit timing supply voltage (v dd ) detection voltage (min.) detection voltage (typ.) detection voltage (max.) t pth t pthd t pw t pd time
29 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm lvi circuit characteristics (t a = ? 40 to +85 c) parameter symbol conditions min. typ. max. unit v lvi0 4.1 4.3 4.5 v v lvi1 3.9 4.1 4.3 v v lvi2 3.7 3.9 4.1 v v lvi3 3.5 3.7 3.9 v v lvi4 3.3 3.5 3.7 v v lvi5 3.15 3.3 3.45 v v lvi6 2.95 3.1 3.25 v v lvi7 2.7 2.85 3.0 v v lvi8 2.5 2.6 2.7 v detection voltage v lvi9 2.25 2.35 2.45 v response time note 1 t ld 0.2 2.0 ms minimum pulse width t lw 0.2 ms operation stabilization wait time note 2 t lwait 0.1 0.2 ms notes 1. time required from voltage detection to interr upt output or internal reset signal generation. 2. time required from setting lvion to 1 to operation stabilization. remarks 1. v lvi0 > v lvi1 > v lvi2 > v lvi3 > v lvi4 > v lvi5 > v lvi6 > v lvi7 > v lvi8 > v lvi9 2. v poc < v lvim (m = 0 to 9) lvi circuit timing supply voltage (v dd ) detection voltage (min.) detection voltage (typ.) detection voltage (max.) t lw t ld t lwait lvion 1 time data memory stop mode low supply vo ltage data retention characteristics (t a = ? 40 to +85 c) parameter symbol conditions min. typ. max. unit data retention supply voltage v dddr 2.0 5.5 v release signal set time t srel 0 s
30 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm flash memory programming characteristics (t a = ?40 to +85 c, 2.7 v v dd 5.5 v, v ss = 0 v) parameter symbol conditions min. typ. max. unit supply current i dd v dd = 5.5 v 7.0 ma erasure count note (per 1 block) n erase t a = ? 40 to +85 c 1000 times 4.5 v v dd 5.5 v 0.8 s 3.5 v v dd < 4.5 v 1.0 s t a = ? 10 to +85 c, n erase 100 2.7 v v dd < 3.5 v 1.2 s 4.5 v v dd 5.5 v 4.8 s 3.5 v v dd < 4.5 v 5.2 s t a = ? 10 to +85 c, n erase 1000 2.7 v v dd < 3.5 v 6.1 s 4.5 v v dd 5.5 v 1.6 s 3.5 v v dd < 4.5 v 1.8 s t a = ? 40 to +85 c, n erase 100 2.7 v v dd < 3.5 v 2.0 s 4.5 v v dd 5.5 v 9.1 s 3.5 v v dd < 4.5 v 10.1 s chip erase time t cerase t a = ? 40 to +85 c, n erase 1000 2.7 v v dd < 3.5 v 12.3 s 4.5 v v dd 5.5 v 0.4 s 3.5 v v dd < 4.5 v 0.5 s t a = ? 10 to +85 c, n erase 100 2.7 v v dd < 3.5 v 0.6 s 4.5 v v dd 5.5 v 2.6 s 3.5 v v dd < 4.5 v 2.8 s t a = ? 10 to +85 c, n erase 1000 2.7 v v dd < 3.5 v 3.3 s 4.5 v v dd 5.5 v 0.9 s 3.5 v v dd < 4.5 v 1.0 s t a = ? 40 to +85 c, n erase 100 2.7 v v dd < 3.5 v 1.1 s 4.5 v v dd 5.5 v 4.9 s 3.5 v v dd < 4.5 v 5.4 s block erase time t berase t a = ? 40 to +85 c, n erase 1000 2.7 v v dd < 3.5 v 6.6 s byte write time t write t a = ? 40 to +85 c, n erase 1000 150 s per 1 block 6.8 ms internal verify t verify per 1 byte 27 s blank check t blkchk per 1 block 480 s retention years t a = 85 c note 2 , n erase 1000 10 years notes 1. depending on the erasure count (n erase ), the erase time varies. refer to the chip erase time and block erase time parameters. 2. when the average temperature when operating and not operating is 85 c. remark when a product is first written after shipment, ?erase write? and ?write only? ar e both taken as one rewrite.
31 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 8. package drawing (preliminary) 16-pin fbga (wafer level csp) (1.93x2.24) item dimensions e w 1.93 0.20 y 0.20 0.08 y1 zd 0.37 0.05 x d 2.24 e 0.50 a 0.48 0.04 a1 0.08 0.02 0.25 0.05 a2 0.40 b p16fh-50-2a2 ze 0.215 a1 s y1 index mark wsb ws a b e xsab m a zd ze a dc ba 1 a2 s ys b d e (unit:mm) v 0.15 4 3 2 v x4 0.25 sd 0.25 se sd se
32 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm appendix a. related documents the related document indicated in this publication may include preliminary vers ions. however, preliminary versions are not marked as such. documents related to devices document name document no. PD78F9210FH, 78f9211fh, 78f9212fh preliminar y product information this manual 78k0s/ky1+ user?s manual u16994e 78k/0s series instructions user?s manual u12326e documents related to development tools (software) (user?s manuals) document name document no. operation u17391e language u17390e ra78k0s ver. 1.50 assembler package structured assembly language u17389e operation u17416e cc78k0s ver. 1.60 c compiler language u17415e operation u17246e sm+ system simulator external part user open interface specifications u17247e id78k0s-qb ver. 2.81 integrated debugger operation u17287e pm+ ver. 5.20 u16934e documents related to development tools (hardware) (user?s manuals) document name document no. ie-78k0s-ns in-circuit emulator u13549e ie-78k0s-ns-a in-circuit emulator u15207e qb-78k0skx1h in-circuit emulator u17272e documents related to fl ash memory programming document name document no. pg-fp4 flash memory progr ammer user?s manual u15260e pg-fpl2 flash memory progr ammer user?s manual u17307e caution the related docum ents listed above are subject to change wit hout notice. be sure to use the latest version of each document when designing.
33 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm other documents document name document no. semiconductor selection guide ? products and packages ? x13769x semiconductor device mount manual note quality grades on nec semiconductor devices c11531e nec semiconductor device reliability/quality control system c10983e guide to prevent damage for semiconductor devi ces by electrostatic discharge (esd) c11892e note see the ?semiconductor device mount manual? webs ite (http://www.necel.com/pkg/en/mount/index.html). caution the related docum ents listed above are subject to change wit hout notice. be sure to use the latest version of each document when designing.
34 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u17798ej1v0pm 1 2 3 4 voltage application waveform at input pin waveform distortion due to input noise or a reflected wave may cause malfunction. if the input of the cmos device stays in the area between v il (max) and v ih (min) due to noise, etc., the device may malfunction. take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between v il (max) and v ih (min). handling of unused input pins unconnected cmos device inputs can be cause of malfunction. if an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd via a resistor if there is a possibility that it will be an output pin. all handling related to unused pins must be judged separately for each device and according to related specifications governing the device. precaution against esd a strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. environmental control must be adequate. when it is dry, a humidifier should be used. it is recommended to avoid using insulators that easily build up static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work benches and floors should be grounded. the operator should be grounded using a wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with mounted semiconductor devices. status before initialization power-on does not necessarily define the initial status of a mos device. immediately after the power source is turned on, devices with reset functions have not yet been initialized. hence, power-on does not guarantee output pin levels, i/o settings or contents of registers. a device is not initialized until the reset signal is received. a reset operation must be executed immediately after power-on for devices with reset functions. power on/off sequence in the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. when switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. the correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. input of signal during power off state do not input signals or an i/o pull-up power supply while the device is not powered. the current injection that results from input of such a signal or i/o pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. notes for cmos devices 5 6
35 PD78F9210FH, 78f9211fh, 78f9212fh preliminary product information u14880ej1v0pm00 superflash is a registered trademark of silicon storage technology, inc. in several countries including the united states and japan. caution: this product uses superflash ? technology licensed from silic on storage technology, inc. the information contained in this document is being issued in advance of the production cycle for the product. the parameters for the product may change before final production or nec electronics corporation, at its own discretion, may withdraw the product prior to its production. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec electronics. nec electronics assumes no responsibility for any errors that may appear in this document. nec electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec electronics products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec electronics or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. nec electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec electronics endeavors to enhance the quality, reliability and safety of nec electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. nec electronics products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to nec electronics products developed based on a customer-designated "quality assurance program" for a specific application. the recommended applications of an nec electronics products depend on its quality grade, as indicated below. customers must check the quality grade of each nec electronics product before using it in a particular application. ? ? ? ? ? ? ? m5d 02. 11-1 the quality grade of nec electronics products is "standard" unless otherwise expressly specified in nec electronics data sheets or data books, etc. if customers wish to use nec electronics products in applications not intended by nec electronics, they must contact an nec electronics sales representative in advance to determine nec electronics' willingness to support a given application. (note) (1) (2) "nec electronics" as used in this statement means nec electronics corporation and also includes its majority-owned subsidiaries. "nec electronics products" means any product developed or manufactured by or for nec electronics (as defined above). computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. "standard": "special": "specific":
PD78F9210FH, 78f9211fh, 78f9212fh nec electronics corporation 1753, shimonumabe, nakahara-ku, kawasaki, kanagawa 211-8668, japan tel: 044-435-5111 http://www.necel.com/ [america] nec electronics america, inc. 2880 scott blvd. santa clara, ca 95050-2554, u.s.a. tel: 408-588-6000 800-366-9782 http://www.am.necel.com/ [asia & oceania] nec electronics (china) co., ltd 7th floor, quantum plaza, no. 27 zhichunlu haidian district, beijing 100083, p.r.china tel: 010-8235-1155 http://www.cn.necel.com/ nec electronics shanghai ltd. room 2509-2510, bank of china tower, 200 yincheng road central, pudong new area, shanghai p.r. china p.c:200120 tel: 021-5888-5400 http://www.cn.necel.com/ nec electronics hong kong ltd. 12/f., cityplaza 4, 12 taikoo wan road, hong kong tel: 2886-9318 http://www.hk.necel.com/ seoul branch 11f., samik lavied?or bldg., 720-2, yeoksam-dong, kangnam-ku, seoul, 135-080, korea tel: 02-558-3737 nec electronics taiwan ltd. 7f, no. 363 fu shing north road taipei, taiwan, r. o. c. tel: 02-2719-2377 nec electronics singapore pte. ltd. 238a thomson road, #12-08 novena square, singapore 307684 tel: 6253-8311 http://www.sg.necel.com/ for further information, please contact: g05.11-1a [europe] nec electronics (europe) gmbh arcadiastrasse 10 40472 dsseldorf, germany tel: 0211-65030 http://www.eu.necel.com/ hanover office podbielskistrasse 164 30177 hannover tel: 0 511 33 40 2-0 munich office werner-eckert-strasse 9 81829 mnchen tel: 0 89 92 10 03-0 stuttgart office industriestrasse 3 70565 stuttgart tel: 0 711 99 01 0-0 united kingdom branch cygnus house, sunrise parkway linford wood, milton keynes mk14 6np, u.k. tel: 01908-691-133 succursale fran?aise 9, rue paul dautier, b.p. 52180 78142 velizy-villacoublay cdex france tel: 01-3067-5800 sucursal en espa?a juan esplandiu, 15 28007 madrid, spain tel: 091-504-2787 tyskland filial t?by centrum entrance s (7th floor) 18322 t?by, sweden tel: 08 638 72 00 filiale italiana via fabio filzi, 25/a 20124 milano, italy tel: 02-667541 branch the netherlands limburglaan 5 5616 hr eindhoven the netherlands tel: 040 265 40 10

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